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| PROCESS Small Signal Transistor NPN - Saturated Switch Transistor Chip CP207 Central TM Semiconductor Corp. PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY GROSS DIE PER 4 INCH WAFER 93,430 PRINCIPAL DEVICE TYPES 2N2369A CMPT2369 EPITAXIAL PLANAR 9.0 x 14 MILS 8.0 MILS 3.1 x 2.9 MILS 3.1 x 2.9 MILS Al - 13,000A Au - 6,000A BACKSIDE COLLECTOR 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R2 (1-August 2002) Central TM PROCESS CP207 Semiconductor Corp. Typical Electrical Characteristics 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R2 (1-August 2002) |
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